The use of integer and floating-point units within a microprocessor is widely used in the computer industry. Generally, the integer unit may provide basic arithmetic and logical operations for the microprocessor, while the floating-point unit provides similar functionality in floating-point format when floating-point operations are to be performed. Additionally, there may be two sets of registers (register files), a floating-point register file (FRF) for the floating-point unit and a general purpose or integer register file (IRF) for the integer unit. Each of the registers in the register files may be a certain bit length (e.g., 32 bits, 64 bits, or the like), and each register file may include any suitable number of registers, such as 8 registers, 16 registers, 32 registers, or the like.
In current microprocessor technology, an integer unit may include an IRF for storing information and one or more execution units for performing operations on the information based on instructions conveyed to the execution units (e.g., through program code). In addition to the one or more execution units, the IRF may also be coupled to one or more buses for the transfer of information to other units, such as memory. In this regard, data may be loaded from memory to the IRF, and then may be operated on by the execution unit, and the result may be returned to the IRF and/or stored back in memory.
The floating-point unit may be configured similarly to the integer unit in that it includes a register file (FRF) that may be coupled to one or more units, such as memory. Further, the floating-point unit may include one or more floating-point execution units that operate based on floating-point instructions. Advantageously, the floating-point unit may provide support for complex numerical and scientific calculations on data that is in floating-point format.
In some instances, it may be desirable to move data between a register of the IRF and a register of the FRF. Generally, processors may perform this function by executing load and store instructions, which operate to move data from a first register file (e.g., an IRF) to memory, and then from memory to a second register file (e.g., an FRF). As can be appreciated, performing load and store memory instructions may undesirably require several cycles of latency, which may reduce the performance of the microprocessor and/or program code executing on the microprocessor.